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GOEPEL electronic extends BSDL Testbench to Multi Chip Modules and 3D Chips

03-10-2011 01:13 PM CET | Industry, Real Estate & Construction

Press release from: GOEPEL electronics Ltd.

GOEPEL electronic

GOEPEL electronic

GOEPEL electronic, world-class vendor of JTAG/Boundary Scan solutions announces the availability of a new option in its recently introduced EDA software TAPChecker™. Multi-Chip Modules (MCM) and 3D chips are now supported, allowing testbench generation for VHDL, Verilog and STIL output formats. Users now have the opportunity to verify more complex designs with several Boundary Scan components or dies incl. interconnections by a comprehensive behaviour simulation.

“The progressive integration technologies at component level such as 3D chips and Multi-Chip Modules require higher performance of the EDA tools for successful implementation and verification. With our TAPChecker software we smooth the way for such purposes”, says Norbert Muench, Manager EDA Software Team within GOEPEL electronic’s JTAG/Boundary Scan Division. “The fully automatic generation of testbenches guarantees a deeper validation and higher design quality of the target as well as the full functionality of all Boundary Scan structures in practical usage.”

“We have focussed on Boundary Scan as test strategy for our newest multi-die design from the very beginning. That’s why a comprehensive validation of the entire IEEE 1149.1 functions were a must already on the design stage”, explains Daniel Wilkinson, Director of Verification with XMOS Semiconductor. “We discussed this target with the responsible specialists in GOEPEL electronic’s EDA software team. The TAPChecker MCM option was made available as agreed in our design process. We verified our JTAG/Boundary Scan implementation before tape out and then exported patterns from the same tool for our production test program.”

TAPChecker™ is based on a modular platform architecture with central database and individually licensable modules for data import and export as well as automatic test vector generation. The software can be utilised for automatic testbench generation to simulate BSDL files and to provide test vectors for IC testers. It is available for various operating systems such as SOLARIS®, Windows® and LINUX®, supporting IEEE 1149.1 and IEEE 1149.6.

About GOEPEL electronic:
GOEPEL electronic is a worldwide leading vendor of professional JTAG/Boundary Scan solutions and technology innovator of IP based instrumentation. With more than 100 product launches the company became the biggest innovator in the market within the last five years. A network of branch offices, distributors and service partners ensures the global availability of the products as well as the support of the more than 7,000 system installations. Founded 1991 and headquartered in Jena, Germany, GOEPEL electronic employs currently about 170 employees and generated a revenue of more than 21 Million Euro in 2010 (ca. $16.5 Mio). GOEPEL electronic has continuously been ISO9001 certified since 1996 and has been honoured with TOP-JOB and TOP-100 awards for being one of the best medium-sized companies in Germany. GOEPEL electronic’s products won several awards in recent years and are used by the leading companies in telecommunication, automotive, space and avionics, industrial controls, medical technology, and other industries. Further information about the company and its products can be found on the internet at www.goepel.com.

GOEPEL electronics Ltd.
Unit 1A
The Old Granary
Westwick, Cambridge
CB24 3AR/UK

Phone +44-1223-858298
Fax +44-1223-257800
www.goepel.co.uk

Stefan Meissner
press@goepel.com

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