openPR Logo
Press release

Centellax Announces 17G Stressed Serial BERT for 16x Fibre Channel (16GFC) and 14 Gb/s InfiniBand FDR Standards

09-05-2011 08:01 AM CET | Media & Telecommunications

Press release from: Centellax, Inc.

Centellax Announces 17G Stressed Serial BERT for 16x Fibre

SANTA ROSA, CALIF.----September 1, 2011—

Centellax announced today the release of a new 3-17G Stressed Serial BERT Solution (model #SSB17) intended for testing to 16x Fibre Channel (16GFC) and 14G InfiniBand FDR standards. This new test solution now offers the highest performance for compliance verification at rates between 3 and 17 Gb/s.

The SSB17 system contains a serial BERT controller (SSB16000 or SSB16000J) and full-rate pattern generator (PG17) and error detector (ED17) remote mountable heads. This compact system allows the pattern generation and error detection to be placed directly next to the DUT, eliminating the need for long, expensive cabling and the loss associated with lengthy cables. All of the standard patterns used for Fibre Channel and InfiniBand are built in. For users with special pattern requirements, programmable patterns up to 8 Mb in length can be easily created and downloaded into the remote heads using the complementary Signal Integrity Studio analysis program.

"The eye quality is exceptional – the rails are flat with virtually no ripple and rise and fall times are fast with minimal overshoot. Along with the eye quality, we have a wide range of amplitude setting ability which allows directly testing receiver sensitivity without the need for switching in external attenuators," said Steve Sekel, Vice President of Product Management at Centellax, Inc. "Plus, our affordable price point provides a solution to cost-sensitive users who, until now, were considering work arounds."

SSB17 Features include:

Full data rate Pattern Generation and Error Detection
Integrated clock source with calibrated stress capability
Built-in selection of PRBS and common telecom/datacom test patterns
Fully programmable user-defined patterns
Remote heads place the signal very close to DUT
Fully programmable generator output/detector input parameters
Remote control through USB or GPIB
Compact size
Free graphical user interface: Centellax Signal Integrity Studio
For more information, visit the SSB17 webpage at http://www.centellax.com/products/testmeas/SSB17.

Established in 2001, Centellax delivers affordable, high-performance test instruments, test accessories, and electrical components for high-speed communications and signal integrity applications worldwide. Corporate headquarters is located in Santa Rosa, CA, just 90 minutes north of San Francisco.

Centellax Headquarters
3843 Brickway Blvd., #100
Santa Rosa, CA 95403, USA
phone: +1.707.568.5900
sales: sales@centellax.com

Centellax China
Unit 3001B, International Chamber Of Commerce Tower,
No.168, Fuhua Rd.3,
CBD Futian District, Shenzhen 518026
P.R. China
深圳市福田中心区福华三路168号深圳国际商会中心3001B
phone: +86.755.33983599
sales: sales-china@centellax.com

This release was published on openPR.

Permanent link to this press release:

Copy
Please set a link in the press area of your homepage to this press release on openPR. openPR disclaims liability for any content contained in this release.

You can edit or delete your press release Centellax Announces 17G Stressed Serial BERT for 16x Fibre Channel (16GFC) and 14 Gb/s InfiniBand FDR Standards here

News-ID: 190344 • Views:

More Releases from Centellax, Inc.

Centellax Announces Webcast on Parallel Jitter Tolerance Testing of Multi-Channe …
Santa Rosa, Calif., April 8, 2011 - Centellax announced today they will be partnering with EDN for a live webcast on optimizing parallel jitter tolerance measurements in multi-lane channels and devices with multiple SERDES. This webcast will explain jitter tolerance testing in depth, with special emphasis on strategies for testing multiple lanes or devices in parallel. In addition, it also clarifies poorly understood concepts such as limit versus

More Releases for Centellax

Bit Error Rate (BER) Tester Market 2022 Global Projection By Key Players -JDS Un …
The "Bit Error Rate (BER) Tester Market" Research Report details key growth drivers and opportunities to drive Market growth from 2022 to 2030. The Bit Error Rate (BER) Tester Market report is an intelligence report that has been meticulously conducted to investigate relevant and valuable information. The data surveyed is designed with both existing top players and upcoming competitors, growth prospects and development trends etc. The business strategies of key
Bit Error Rate (BER) Tester Market Offering New Study Visions for 2027 & COVID …
This comprehensive Bit Error Rate (BER) Tester market report examines the sales and income share of major corporations. The market is divided into four sections: application, specific product, user experience, and geography. North America, Asia Pacific, Latin America, the Middle East and Africa, and Europe are among the important market regions covered. Key manufacturers are also listed here to assist new entrants into the business. It also demonstrates how the
Bit Error Rate Testers (BERT) Market Segmentations and Key players: Tektronix, C …
Bit error rate testers are usually designed for testing radio telemetry systems, synchronous serial communication equipment, and communication links. The high rate of penetration of broadband communication and sharp rise in demand of the access lines are driving the need of communication links with high transmission capacity and very low bit error rate. When some data is transmitted over a particular communication channel, there is a probability of errors being
Centellax Announces Webcast on Parallel Jitter Tolerance Testing of Multi-Channe …
Santa Rosa, Calif., April 8, 2011 - Centellax announced today they will be partnering with EDN for a live webcast on optimizing parallel jitter tolerance measurements in multi-lane channels and devices with multiple SERDES. This webcast will explain jitter tolerance testing in depth, with special emphasis on strategies for testing multiple lanes or devices in parallel. In addition, it also clarifies poorly understood concepts such as limit versus
Centellax, Inc. Releases SCS16000 Series of 16 GHz Stressed Clock Synthesizers
SANTA ROSA, CALIF.----February 1, 2011— Centellax announced today the release of their new SCS16000 series of compact 16 Gb/s stressed clock synthesizers. There are currently 2 models in the series: SCS16000: 16 Gb/s Stressed clock Synthesizer with sinusoidal jitter injection capability SCS16000J: 16 Gb/s Stressed Clock Synthesizer with two tone sinusoidal jitter, true random jitter injection, and spread spectrum clock modulation capabilities. This series has been designed from the ground up optimized for signal
Centellax, Inc. Releases Windows-based Graphical User Interface for Multiple Ins …
SANTA ROSA, CALIF.----January 12, 2011— Centellax announced today the release of their new Centellax Signal Integrity Studio (SIS) application, Version 1.0. SIS provides Centellax customers the ability to control multiple Centellax instruments through a Windows-based Graphical User Interface (GUI). This easy-to-understand interface allows for a more integrated and effective use of Centellax products. According to Steve Sekel, Centellax VP of Marketing, “SIS marks the beginning of the rich software applications that